Serial communication is common in telecommunications and computer systems. Data are sent sequentially, one bit at a time, on a single communication line. Serial communication is simple and often low-cost. There are now many standards for serial bus communication. Some of these standards are SPI, I2C, 1-Wire, Intelligent Chassis Management Bus (ICMB), Universal Serial Bus (USB), RS-232, RS-423, and RS-485. Many manufacturers create components, such as transceivers and control chips, in accordance with these standards. Consequently there is a wealth of competitively priced and reliable components for standard bussing arrangements.
One of these popular standards is RS-485, also known as EIA-485 standard, or ANSI/TIA/EIA-485-A-98 (“Electrical Characteristics of Generators and Receivers for Use in Balanced Digital Multipoint Systems”, published by the American National Standards Institute, the Telecommunications Industry Association, and the Electronic Industries Alliance). The RS-485 standard is a physical layer standard used for half-duplex, multipoint, serial communication. Multiple nodes (alternatively called hosts, stations or devices) connect to a bus, but only one node transmits signals through the bus at a given instant. At that time each of the other nodes are in receiving mode, “listening” to the signals coming over the bus.
One type of bus that applies the RS-485 standard is the Intelligent Chassis Management Bus, or ICMB. ICMB can be used for communication among one or more central monitoring systems and multiple slots on a chassis, each of which may be occupied by a computer or another type of electronic system. Through the ICMB bus, the central system can monitor the status of each slot (whether occupied or not), and collect information from each occupied slot, for example regarding the board-number, temperature, fan-speed or power-consumption for each one of these systems connected to the bus. It can also send commands addressed to one of those systems (unicast) or a group of them (multicast) in order to, for example, reset them, or turn them on or off.
FIG. 1A is a system diagram for a system 100 using a multipoint, half duplex, serial bus. System 100 has a bus 110 connected to multiple nodes 113, two of which are shown.
Bus 110 is a multipoint serial bus, built and operating according to the RS-485 standard. Signals can be sent on the bus by each node connected to the bus and can be received by all nodes connected to the bus, as known in the art.
Each node 113 can for example be a computer, or another module, e.g. an Egenera processor blade within an Egenera blade frame system. The node includes a transceiver 106, a Baseboard Management Controller (BMC) 103, and a node logic 104.
The BMC 103 is a commodity chip. In this case it includes a UART (universal asynchronous receiver/transmitter) unit 105 which is responsible for transforming internal parallel signals to the serial binary signals to be transmitted out to the bus 110, and vice versa. Typically, BMC (and associated software) includes all the logic needed for communication with the bus 110.
Transceiver 106 is a commodity bus interface built in accordance with the RS-485 standard. It is responsible for transmitting signals to the bus and receiving signals from the bus. It transforms serial binary signals received from the UART to bus signals and transmits them on the bus 110. It also transforms differential signals received on bus 110 into serial binary signals and sends them to the UART 105.
The node logic 104 represents arbitrary logic or processors that the node 113 may contain in addition to a BMC. It may for example be a processor and memory.
Communication signals from the node are sent to the UART for example in the form of parallel signals. The UART transforms these signals into a serial binary signal and sends them to transceiver 106. The transceiver transforms these serial binary signals into a format used by the bus (e.g., differential signal) as defined by the standard, and transmits them to the bus 110. On the other hand, signals coming over the bus in the form of differential signals are received and transformed by the transceiver into serial binary signals and sent to the UART, which in turn transform them into parallel signals.
FIG. 1B is a high level physical diagram of system 100 shown in FIG. 1A. It details the structure of the bus and its connections to the nodes. The system includes two differential signal wires 110a and 110b and nodes 113, each connected to the two signal wires. The two signal wires 110a and 110b together represent the bus 110 in FIG. 1A.
Differential signals transmitted on the bus are in the form of a voltage difference ΔV between the two wires 110a and 110b. To send a signal, each node 113, through its transceiver 106, can introduce a voltage difference ΔV between the two wires. All other nodes will receive the voltage difference through their transceivers. In some implementations one of the nodes, designated as a master controller, is the only node that initiates a signal on the bus, and other nodes typically listen for differential signals.
FIG. 1C is a signal diagram depicting exemplary signal waveforms in an RS-485 bus. The vertical direction represents the voltage level and the horizontal direction represents time. The two waveforms labeled as 110a and 110b respectively represent the voltage levels in the two bus wires 110a and 110b. Three types of time periods are distinguished: time periods with no signal, marked as idle; time periods with a signal representing 1; and time periods with a signal representing 0. During the idle periods the voltages are at quiescent levels. Once voltages are introduced on the wires, such that the absolute value of ΔV exceeds the threshold value Vth, it is interpreted as a binary signal. In the example of FIG. 1C, whenever the voltage in wire 110a is more than that of wire 110b by an amount Vth, the signal is interpreted as a binary 1. Likewise, whenever the voltage in wire 110a is less than that of wire 110b by an amount Vth, the signal is interpreted as a binary 0.
The RS-485 multipoint busses are susceptible to total failures in the event of certain kinds of faults. For example, if any transceiver causes a short circuit between the two signal wires (a short circuit fault), the entire bus will be short-circuited, and no nodes can communicate through that bus. Alternatively, if due to a failure, a transceiver continuously drives a signal onto the signal wires of the bus (continuous drive fault), no other transceiver can override it, and again the entire bus will be rendered nonfunctional. These kinds of faults disrupt the differential signaling, and render the entire bus structure unusable by all nodes, since they can not detect the information.